BMX EHC 0200 Module Operation in Modulo Loop Counter Mode

At a Glance

The use of the modulo loop counter mode is recommended for packaging and labeling applications for which actions are repeated for series of moving objects.

Basic Principle

In the upcounting direction, the counter increases until it reaches the modulo value -1, the modulo value being defined by the user. At the following pulse in the counting direction, the counter is reset to 0 and the counting resumes.

In the downcounting direction, the counter decreases until it reaches 0. At the next pulse in the counting direction, the counter is reset to the the modulo value -1, the modulo value being defined by the user. The downcounting may then be resumed.

The enable function must be activated during the counting by:

Setting to 1 the force_enable bit (%Qr.m.c.6)
Setting to 1 the valid_enable bit (%QWr.m.c.0.2) when the IN_EN input is at the high level

When the enable function is deactivated, the last value reported in the counting register is maintained and the counter ignores the pulses applied to the IN_A input. However, it does not ignore the preset condition.

In the modulo loop counter mode, the counter must be synchronized at least one time to operate. The current counter value is cleared each time the synchronization occurs.

The current counter value can be recorded into the capture0 register when the condition of synchronization occurs.

The modulo value defined by the user is contained in the modulo_value word %MDr.m.c.4. The user may change this value by specifying the value of this word:

In the ajust screen
In the application, using the WRITE_PARAM(IODDT_VAR1) Function. IODDT_VAR1 is of the type T_UNSIGNED_CPT_BMX.

The new modulo value is acknowledged if one of the two following conditions is met:

The synchronization is activated
The counter rollovers the value 0 in the downcounting direction or the modulo value -1 (this value is the modulo value recorded before editing the new modulo value) in the upcounting direction.

Counting Interface

In this mode, the user may select one of the following counting configurations:

A = Up, B = Down (default configuration)
A = Impulse, B = Direction
Normal Quadrature X1
Normal Quadrature X2
Normal Quadrature X4
Reverse Quadrature X1
Reverse Quadrature X2
Reverse Quadrature X4.

The following table shows the upcounting and downcounting principle according to the selected configuration:

Selected configuration	Upcounting condition	Downcounting condition
A = Up, B = Down	Rising edge at the IN_A input.	Rising edge at the IN_B input.
A = Impulse, B = Direction	Rising edge at the IN_A input and low state at the IN_B input.	Rising edge at the IN_A input and high state at the IN_B input.
Normal Quadrature X1	Rising edge at the IN_A input and low state at the IN_B input.	Falling edge at the IN_A input and low state at the IN_B input
Normal Quadrature X2	Rising edge at the IN_A input and low state at the IN_B input. Falling edge at the IN_A input and high state at the IN_B input.	Falling edge at the IN_A input and low state at the IN_B input. Rising edge at the IN_A input and high level at the IN_B input.
Normal Quadrature X4	Rising edge at the IN_A input and low state at the IN_B input. High state at the IN_A input and rising edge at the IN_B input. Falling edge at the IN_A input and high state at the IN_B input. Low state at the IN_A input and falling edge at the IN_B input.	Falling edge at the IN_A input and low state at the IN_B input. Low state at the IN_A input and rising edge at the IN_B input. Rising edge at the IN_A input and high level at the IN_B input. High state at the IN_A input and falling edge at the IN_B input.
Reserve Quadrature X1	Falling edge at the IN_A input and low state at the IN_B input.	Rising edge at the IN_A input and low state at the IN_B input.
Reserve Quadrature X2	Falling edge at the IN_A input and low state at the IN_B input. Rising edge at the IN_A input and high level at the IN_B input.	Rising edge at the IN_A input and low state at the IN_B input. Falling edge at the IN_A input and high state at the IN_B input.
Reserve Quadrature X4	Falling edge at the IN_A input and low state at the IN_B input. Low state at the IN_A input and rising edge at the IN_B input. Rising edge at the IN_A input and high level at the IN_B input. High state at the IN_A input and falling edge at the IN_B input.	Rising edge at the IN_A input and low state at the IN_B input. High state at the IN_A input and rising edge at the IN_B input. Falling edge at the IN_A input and high state at the IN_B input. Low state at the IN_A input and falling edge at the IN_B input.

Operation

The trend dithe modulo counting process in the configuration by default (IN_A = counting, In_B = downcounting):

Counter Status Bits in Modulo Loop Counter Mode

The table below shows the composition of the counter’s %IWr.m.c.0 status word in modulo loop counter mode:

Bit	Label	Description
%IWr.m.c.0.1	MODULO_FLAG	The bit is set to 1 when the counter rollovers the modulo and is . The bit is reset to 0 when the command MODULO_RESET (%Qr.m.c.9) is received (rising edge of the MODULO_RESET bit).
%IWr.m.c.0.2	SYNC_REF_FLAG	The bit is set to 1 when the counter have been set to 0 and (re)started. The bit is reset to 0 when the command SYNC_RESET (%Qr.m.c.8) is received (rising edge of the SYNC_RESET bit).
%IWr.m.c.0.3	VALIDITY	Validity bit is used to indicate that the counter current value and compare status registers contain valid data. If the bit is set to 1, the data is valid. If the bit is set to 0, the data is not valid.

Type of the IODDT

In this mode, the type of the IODDT must be T_UNSIGNED_CPT_BMX.

Operating Limits

The maximum frequency that can be applied to the IN_SYNC input is 1 pulse every 5 ms.

The maximum frequency for the modulo event is once every 5 ms.

The maximum value for the defined modulo value and the counter is 4,294,967,295.

NOTE: You have to check the validity bit (%IWr.m.c.0.3) before taking into account the numerical values such as the counter and the capture registers. Only the validity bit at the high level (set to 1) guarantees that the mode will operate correctly within the limits.