Synchronization, Homing, Enable, Reset to 0 and Capture Functions

Introduction

This section presents the functions used by the various counting modes of the BMX EHC 0200 module:

Synchronization function
Homing function
Enable function
Reset to 0 function
Capture functions

Each function uses at least one of the following two bits:

valid_(function) bit: Setting this bit to 1 allows you to take into account the occurrence of an external event which activates the function. If this bit is set to 0, the event is not taken into account and does not activate the function. The functions_enabling word (%QWr.m.c.0) contains all the valid_(function) bits.
force_(function) bit: Setting this bit to 1 allows you to activate the function irrespective of the status of the external event. All the force_(function) bits are %Qr.m.c.4...%Qr.m.c.8 language objects.

Synchronization Function

The synchronization function is used to synchronize the counter operation upon a transition applied to the IN_SYNC (%I r.m.c.6) physical input or the force_sync bit set to 1.

This function is usable in the following counting modes:

Pulse width modulation: to restart the output signal at the beginning (phase at 1)
Modulo loop counter: to reset and start the counter
One shot counter: to preset and start the counter
Event counting: to restart the internal time base at the beginning

The user may configure the synchro edge parameter in the configuration screen by choosing from the following two possibilities to configure the sensitive edge that carries out the synchronization:

Rising edge of the IN_SYNC input
Falling edge of the IN_SYNC input

The following table presents the force_sync bit in bold which is an element of the %Qr.m.c.d output command word:

Language object	Standard symbol	Meaning
%Qr.m.c.0	OUTPUT_0	Forces OUTPUT_0 to level 1
%Qr.m.c.1	OUTPUT_1	Forces OUTPUT_1 to level 1
%Qr.m.c.2	OUTPUT_BLOCK_0_ENABLE	Implementation of output 0 function block
%Qr.m.c.3	OUTPUT_BLOCK_1_ENABLE	Implementation of output 1 function block
%Qr.m.c.4	FORCE_SYNC	Counting function synchronization and start
%Qr.m.c.5	FORCE_REF	Set to preset counter value
%Qr.m.c.6	FORCE_ENABLE	Implementation of counter
%Qr.m.c.7	FORCE_RESET	Reset counter
%Qr.m.c.8	SYNC_RESET	Reset SYNC_REF_FLAG
%Qr.m.c.9	MODULO_RESET	Reset MODULO_FLAG

The following table presents the valid_sync bit in bold which is an element of the %QWr.m.c.0 function enabling word:

Language object	Standard symbol	Meaning
%QWr.m.c.0.0	VALID_SYNC	Synchronization and start authorization for the counting function via the IN_SYNC input
%QWr.m.c.0.1	VALID_REF	Operation authorization for the internal preset function
%QWr.m.c.0.2	VALID_ENABLE	Authorization of the counter enable via the IN_EN input
%QWr.m.c.0.3	VALID_CAPT_0	Capture authorization in the capture0 register
%QWr.m.c.0.4	VALID_CAPT_1	Capture authorization in the capture1 register
%QWr.m.c.0.5	COMPARE_ENABLE	Comparators operation authorization
%QWr.m.c.0.6	COMPARE_SUSPEND	Comparator frozen at its last value

The following table presents the synchronization principle:

Edge	Status of the valid_sync (%QWr.m.c.0.0) bit	Status of the counter
Rising or falling edge on IN_SYNC (depending on the configuration)	Set to 0	Not synchronized
Rising or falling edge on IN_SYNC (depending on the configuration)	Set to 1	Synchronized
Rising edge on force_sync (%Qr.m.c.4) bit	Set to 0 or 1	Synchronized

When the synchronization occurs, the application can react using :

Homing Function

This homing function loads the value predefined in the adjust screen preset value (%MDr.m.c.6) into the counter when the preset condition (defined by the preset mode parameter) occurs. This preset condition takes into account the IN_SYNC and IN_REF physical inputs to define the reference point of the process.

This function is only used in the free large counter mode.

The user may change the Preset Mode parameter in the configuration screen by choosing from the following five possibilities to configure the preset condition:

Rising edge of the IN_SYNC input
Rising edge of the IN_REF input
Rising edge of the IN_SYNC input and high level of the IN_REF input
First rising edge of the IN_SYNC input and high level of the IN_REF input
First rising edge of the IN_SYNC input and low level of the IN_REF input

The following table presents the force_ref bit in bold which is an element of the %Qr.m.c.d output command word:

Language object	Standard symbol	Meaning
%Qr.m.c.0	OUTPUT_0	Forces OUTPUT_0 to level 1
%Qr.m.c.1	OUTPUT_1	Forces OUTPUT_1 to level 1
%Qr.m.c.2	OUTPUT_BLOCK_0_ENABLE	Implementation of output 0 function block
%Qr.m.c.3	OUTPUT_BLOCK_1_ENABLE	Implementation of output 1 function block
%Qr.m.c.4	FORCE_SYNC	Counting function synchronization and start
%Qr.m.c.5	FORCE_REF	Set to preset counter value
%Qr.m.c.6	FORCE_ENABLE	Implementation of counter
%Qr.m.c.7	FORCE_RESET	Reset counter
%Qr.m.c.8	SYNC_RESET	Reset SYNC_REF_FLAG
%Qr.m.c.9	MODULO_RESET	Reset MODULO_FLAG

The following table presents the valid_ref bit in bold which is an element of the %QWr.m.c.0 function enabling word:

Language object	Standard symbol	Meaning
%QWr.m.c.0.0	VALID_SYNC	Synchronization and start authorization for the counting function via the IN_SYNC input
%QWr.m.c.0.1	VALID_REF	Operation authorization for the internal preset function
%QWr.m.c.0.2	VALID_ENABLE	Authorization of the counter enable via the IN_EN input
%QWr.m.c.0.3	VALID_CAPT_0	Capture authorization in the capture0 register
%QWr.m.c.0.4	VALID_CAPT_1	Capture authorization in the capture1 register
%QWr.m.c.0.5	COMPARE_ENABLE	Comparators operation authorization
%QWr.m.c.0.6	COMPARE_SUSPEND	Comparator frozen at its last value

The following table presents the homing principle:

Edge	Status of the valid_ref bit (%QWr.m.c.0.1)	Status of the counter
Homing condition edge (depending on the configuration)	Set to 0	Not preset
Homing condition edge (depending on the configuration)	Set to 1	Preset
Rising edge on force_ref bit (%Qr.m.c.5)	Set to 0 or 1	Preset

When the preset occurs consequently to the preset condition, the application can react using:

Enable Function

This function is used to authorize changes to the current counter value depending on the status of the IN_EN physical input.

This function is used in the following counting modes:

Pulse width modulation
Modulo loop counter
One shot counter
Free large counter

The following table presents the force_enable bit in bold which is an element of the %Qr.m.c.d output command word:

Language object	Standard symbol	Meaning
%Qr.m.c.0	OUTPUT_0	Forces OUTPUT_0 to level 1
%Qr.m.c.1	OUTPUT_1	Forces OUTPUT_1 to level 1
%Qr.m.c.2	OUTPUT_BLOCK_0_ENABLE	Implementation of output 0 function block
%Qr.m.c.3	OUTPUT_BLOCK_1_ENABLE	Implementation of output 1 function block
%Qr.m.c.4	FORCE_SYNC	Counting function synchronization and start
%Qr.m.c.5	FORCE_REF	Set to preset counter value
%Qr.m.c.6	FORCE_ENABLE	Implementation of counter
%Qr.m.c.7	FORCE_RESET	Reset counter
%Qr.m.c.8	SYNC_RESET	Reset SYNC_REF_FLAG
%Qr.m.c.9	MODULO_RESET	Reset MODULO_FLAG

The following table presents the valid_enable bit in bold which is an element of the %QWr.m.c.0 function enabling word:

Language object	Standard symbol	Meaning
%QWr.m.c.0.0	VALID_SYNC	Synchronization and start authorization for the counting function via the IN_SYNC input
%QWr.m.c.0.1	VALID_REF	Operation authorization for the internal preset function
%QWr.m.c.0.2	VALID_ENABLE	Authorization of the counter enable via the IN_EN input
%QWr.m.c.0.3	VALID_CAPT_0	Capture authorization in the capture0 register
%QWr.m.c.0.4	VALID_CAPT_1	Capture authorization in the capture1 register
%QWr.m.c.0.5	COMPARE_ENABLE	Comparators operation authorization
%QWr.m.c.0.6	COMPARE_SUSPEND	Comparator frozen at its last value

The following table presents the validation principle:

Condition	Status of the valid_enable bit (%QWr.m.c.0.2) and force_enable bit (%Qr.m.c.6)	Status of the counter
IN_EN set to 1	The 2 bits are set to 0	Not counting (frozen)
IN_EN set to 1	At least one of the two bits is set to 1	Counting (free)

Reset to 0 Function

This function is used to load the value 0 into the counter via software command.

This function is used in the following counting modes:

Free large counter
Modulo loop counter
One shot counter

The following table presents the force_reset bit in bold which is an element of the %Qr.m.c.d output command word:

Language object	Standard symbol	Meaning
%Qr.m.c.0	OUTPUT_0	Forces OUTPUT_0 to level 1
%Qr.m.c.1	OUTPUT_1	Forces OUTPUT_1 to level 1
%Qr.m.c.2	OUTPUT_BLOCK_0_ENABLE	Implementation of output 0 function block
%Qr.m.c.3	OUTPUT_BLOCK_1_ENABLE	Implementation of output 1 function block
%Qr.m.c.4	FORCE_SYNC	Counting function synchronization and start
%Qr.m.c.5	FORCE_REF	Set to preset counter value
%Qr.m.c.6	FORCE_ENABLE	Implementation of counter
%Qr.m.c.7	FORCE_RESET	Reset counter
%Qr.m.c.8	SYNC_RESET	Reset SYNC_REF_FLAG
%Qr.m.c.9	MODULO_RESET	Reset MODULO_FLAG

The function is only activated by the rising edge of the force_reset bit (%Qr.m.c.7). There is no valid_reset bit because the function is not activated by any physical input.

Capture Function

This function allows to store the current counter value into a capture register upon an external condition.

Each BMX EHC 0200 module channel has 2 capture registers:

capture0
capture1.

The capture function is used in the following counting modes:

Modulo loop counter
Free large counter.

In the modulo loop counter mode, only the capture0 function is available.

The function enables to record the current counter value according to the synchronisation condition.

If the IN_SYNC input receives the sensitive edge of synchronization, the current counter value is stored into the capt_0_val register (%IDr.m.c.14). The valid_capt_0 bit (%QWr.m.c.0.3) must be set to 1 to operate.

When the synchronization is requiered at the same time (with the valid_sync bit set to 1) the storage into the capt_0_val register occurs just before reseting the current counter value.

In the free large counter mode, both capture0 and capture1 registers are available.

The capture1 function always stores the current counter value into the capt_1_val register (%IDr.m.c.16) as soon as the IN_CAP input receives a rising edge. The valid_capt_1 bit (%QWr.m.c.0.4) must be set to 1 to operate.

The capture0 function can be configured as one of the following 2 conditions:

Preset condition
Falling edge of the IN_CAP input.

The valid_capt_0 bit (%QWr.m.c.0.3) must be set to 1 to operate.

If the capture0 function is configured as the preset condition, the function stores the current counter value into the capt_0_val register (%IDr.m.c4) when the defined preset condition occurs.

When the preset is requiered at the same time (with the valid_ref bit set to 1) the storage into the capt_0_val register occurs just before loading the current counter value at the preset value.

In all cases, the current counter value must be valid before the capture event (the validity bit (%IWr.m.c.0.3) set to 1)