Addressing

Flat Addressing

This module requires 32 contiguous, output references (%M) or 2 contiguous output words (%MW) for output data and 32 contiguous, input references (%I) or 2 contiguous input words (%IW) for verification input data. For a description of how to access the input points, please refer to Discrete I/O Bit Numbering.

Output Words:

Input Words:

Topological Addressing

Topological addresses in Bit Mapping format:

Point	I/O Object	Comment
Input 1	%I[\b.e\]r.m.1	Value
Input 2	%I[\b.e\]r.m.2	Value
• • •
Input 31	%I[\b.e\]r.m.31	Value
Input 32	%I[\b.e\]r.m.32	Value
Output 1	%Q[\b.e\]r.m.1	Value
Output 2	%Q[\b.e\]r.m.2	Value
• • •
Output 31	%Q[\b.e\]r.m.31	Value
Output 32	%Q[\b.e\]r.m.32	Value

Topological addresses in Word Mapping format:

Point	I/O Object	Comment
Inputword 1	%IW[\b.e\]r.m.1.1	Value
Inputword 2	%IW[\b.e\]r.m.1.2	Value
Outputword 1	%QW[\b.e\]r.m.1.1	Value
Outputword 2	%QW[\b.e\]r.m.1.2	Value

Used abbreviations: b = bus, e = equipment (drop), r = rack, m = module slot.

I/O Map Status Byte

The eight bits in the I/O map status byte are used as follows:

The voltage error bit is set when the field supply is not present, or the group fuse is blown.

The miscompare bit is set when any point within the group does not match its commanded state.