Introduction
You can wire the BMXSAI0410 safety analog input module to analog sensors to achieve SIL3 compliance in several different ways, depending on:
the required Category (Cat2 or Cat4) and Performance Level (PLd or PLe) standard
your application’s requirements for high availability
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The following SIL3 digital input application wiring examples are described, below:
Cat2/PLd:
a single sensor wired to one input.
Cat2/PLd with high availability:
two sensors wired to two input points on different input modules.
Cat4/PLe:
two sensors, each wired to a different input point on the same input module.
Cat4/PLe with high availability:
two pair of sensors (for a total of four sensors): the sensors of the first pair are each wired to a different input point on one module, and the sensors of the second pair are each wired to a different input point on a second module.
SIL3 Cat2/PLd
The following example presents a single sensor wired to one input point on a single input module. The CPU performs 1oo1D evaluation on the single monitored value:

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SIL3 Cat2/PLd with High Availability
The following example presents two sensors that monitor the same process variable. Each sensor is connected to a single input point on different input modules. The CPU performs 1oo1D evaluation of the single monitored value:

S_AIHA
function block in the SAFE task to manage the two
process variable values reported by the two sensors.CAUTION | |
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SIL3 Cat4/PLe
The following example presents two sensors that monitor the same process variable. Each sensor is connected to a single input point on the same input module. The CPU performs a 1oo2D evaluation of the competing values provided by the two sensors for the same process variable:

S_AI_COMP
function block in the SAFE task to perform a 1oo2D
evaluation of the competing values coming from the two sensors.CAUTION | |
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SIL3 Cat4/PLe with High Availability
The following example presents two pair of redundant sensors, which monitor the same process variable. Each sensor is connected to a single input point on two different input modules (two inputs on each module). This design makes it possible for the CPU to perform a 1oo2D evaluation:

S_AI_COMP
and S_AIHA
function blocks inside the SAFE task to manage the four input signals:S_AI_COMP
to perform 1oo2 evaluation of two pairs of values coming from both sensors connected to the same module.S_AIHA
to manage the high availability feature.
The following function block diagram depicts the above referenced code segment design:

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