Details of the IODDT's implicit exchange objects of type T_COUNT_HIGH

At a Glance

The tables below show the IODDT's implicit exchange objects of type T_COUNT_HIGH_SPEED which applies to the module TSX CTY 2C.

List of numerical values

The table below shows different implicit exchange numerical values of the IODDT.

Standard symbol	Type	Access	Meaning	Address
CUR_MEASURE	DINT	R	Current counter value (24 active bits).	%IDr.m.c.0
CAPT	DINT	R	Captured counter value (24 active bits).	%IDr.m.c.4
SPEED	DINT	R	Speed in number of pulses per second (24 active bits)	%IDr.m.c.8
MULTIPLEX_ADDR	INT	R	Multiplexed address of the absolute encoder with parallel outputs.	%IWr.m.c.10

Software information: bits %Ir.m.c.d

The table below shows the meanings of the %Ir.m.c.d status bits.

Standard symbol	Type	Access	Meaning	Address
CH_ERROR	BOOL	R	Counting channel error bit	%Ir.m.c.ERR
ENAB_ACTIV	EBOOL	R	Counter enable active	%Ir.m.c.0
PRES_DONE	EBOOL	R	Preset done	%Ir.m.c.1
CAPT_DONE	EBOOL	R	Capture done	%Ir.m.c.2
COUNT_FLT	EBOOL	R	Counting fault	%Ir.m.c.4
CUR_MEAS_THR0	EBOOL	R	Current value ≥ at threshold 0	%Ir.m.c.5
CUR_MEAS_THR1	EBOOL	R	Current value ≥ at threshold 1	%Ir.m.c.6
COUNT_DIR	EBOOL	R	Counting direction 0 : direction - (down counting), 1: direction + (up counting)	%Ir.m.c.9
CAPT_THR0	EBOOL	R	Captured value ≥ at threshold 0	%Ir.m.10
CAPT_THR1	EBOOL	R	Captured value ≥ at threshold 1	%Ir.m.11
INC_MOD_DONE	EBOOL	R	Modulo crossing increasing direction	%Ir.m.12
DEC_MOD_DONE	EBOOL	R	Modulo crossing - direction	%Ir.m.13

Status of physical inputs/outputs, word %IWr.m.c.2

The table below shows the meanings of status word bits %IWr.m.c.2.

Standard symbol	Type	Access	Meaning	Address
ST_IA	BOOL	R	Status of physical counting input IA	%IWr.m.c.2.0
ST_IB	BOOL	R	Status of physical counting input IB	%IWr.m.c.2.1
ST_IENAB	BOOL	R	Status of physical enable input IEna	%IWr.m.c.2.2
ST_IPRES	BOOL	R	State of the IPres or IReset physical preset input	%IWr.m.c.2.3
ST_CAPT	BOOL	R	State of physical capture input ICapt	%IWr.m.c.2.4
ST_IZ	BOOL	R	Status of physical counting input IZ	%IWr.m.c.2.6
INVALID_MEAS	BOOL	R	Invalid measurement	%IWr.m.c.2.7
ST1_SSI_FRAME	BOOL	R	Rank 1 status bit from the SSI frame, or odd parity bit (SSI absolute encoder with odd parity, not checked by the module), or least significant part of the address (absolute encoder with multiplexed parallel outputs and adaptation base unit).	%IWr.m.c.2.8
ST2_SSI_FRAME	BOOL	R	Rank 2 status bit from the SSI frame, or most significant part of the address (absolute encoder with multiplexed parallel outputs and adaptation base unit).	%IWr.m.c.2.9
ST3_SSI_FRAME	BOOL	R	Rank 3 status bit from the SSI frame, or specific fault bit on absolute encoder with parallel outputs.	%IWr.m.c.2.10
ST4_SSI_FRAME	BOOL	R	Rank 4 status bit 4 from the SSI frame	%IWr.m.c.2.11
ST_Q2	BOOL	R	Q2 output status	%IWr.m.c.2.12
ST_Q3	BOOL	R	Q3 output status	%IWr.m.c.2.13
ST_Q0	BOOL	R	Q0 output status	%IWr.m.c.2.14
ST_Q1	BOOL	R	Q1 output status	%IWr.m.c.2.15

Status of events and switches, word %IWr.m.c.3

The table below shows the meanings of status word bits %IWr.m.c.3.

Standard symbol	Type	Access	Meaning	Address
ENAB_EVT	BOOL	R	Enabling event	%IWr.m.c.3.0
PRES_EVT	BOOL	R	Event preset or reset	%IWr.m.c.3.1
CAPT_EVT	BOOL	R	Capture event	%IWr.m.c.3.2
CAPT_EDGE	BOOL	R	Capture edge direction 0 : rising edge, 1: falling edge.	%IWr.m.c.3.3
THR0_EVT	BOOL	R	Threshold 0 crossing event	%IWr.m.c.3.5
THR1_EVT	BOOL	R	Threshold 1 crossing event	%IWr.m.c.3.6
ST_COUNT_DIR	BOOL	R	Direction when crossing threshold or setpoint 0 : direction - (down counting), 1: direction + (up counting)	%IWr.m.c.3.9
ST_LATCH0	BOOL	R	State of switch 0	%IWr.m.c.3.10
ST_LATCH1	BOOL	R	State of switch 1	%IWr.m.c.3.11
INC_MOD_EVT	BOOL	R	Modulo crossing in + direction event	%IWr.m.c.3.12
DEC_MOD_EVT	BOOL	R	Modulo crossing in - direction event	%IWr.m.c.3.13
OVERRUN_EVT	BOOL	R	Overrun events (channel level).	%IWr.m.c.3.15

Software commands, bits %Qr.m.c.d

The table below shows the meanings of command bits %Qr.m.c.d.

Standard symbol	Type	Access	Meaning	Address
DIR_ENAB	EBOOL	R/W	Direct enabling by the software	%Qr.m.c.0
DIR_PRES	EBOOL	R/W	Direct preset by the software	%Qr.m.c.1
DIR_CAPT	EBOOL	R/W	Direct capture by the software	%Qr.m.c.2
FLT_ACK	EBOOL	R/W	Fault acknowledgment	%Qr.m.c.3
ENAB_IENAB	EBOOL	R/W	Enabling the physical input IEna	%Qr.m.c.5
ENAB_IPRES	EBOOL	R/W	Enabling the physical input IPRES	%Qr.m.c.6
ENAB_ICAPT	EBOOL	R/W	Enabling the physical input ICapt	%Qr.m.c.7
ENAB_Q3_AUTO	EBOOL	R/W	Enabling the Q3 output in automatic mode	%Qr.m.c.9
SET_LATCH0	EBOOL	R/W	Switch 0 set to 1	%Qr.m.c.10
SET_LATCH1	EBOOL	R/W	Switch 1 set to 1	%Qr.m.c.11
RESET_LATCH0	EBOOL	R/W	Switch 0 set to 0	%Qr.m.c.12
RESET_LATCH1	EBOOL	R/W	Switch 1 set to 0	%Qr.m.c.13
ENAB_Q0_AUTO	EBOOL	R/W	Enabling the Q0 output in automatic mode	%Qr.m.c.14
ENAB_Q1_AUTO	EBOOL	R/W	Enabling the Q1 output in automatic mode	%Qr.m.c.15
MANU_CMD_Q2	EBOOL	R/W	Manual command output Q2	%Qr.m.c.20
MANU_CMD_Q3	EBOOL	R/W	Manual command output Q3	%Qr.m.c.21

Reset and output commands, word %QWr.m.c.0

The table below shows the meanings of the command word bits %QWr.m.c.0.

Standard symbol	Type	Access	Meaning	Address
PRES_RESET	BOOL	R/W	Reset of hardware preset done	%QWr.m.c.0.1
CAPT_RESET	BOOL	R/W	Hardware reset capture done	%QWr.m.c.0.2
MOD_RESET	BOOL	R/W	Reset modulo crossing done	%QWr.m.c.0.4
COUNT_DIR_CHG	BOOL	R/W	Counting direction 0 : direction - (down counting), 1: direction + (up counting)	%QWr.m.c.0.9
REACTIV_Q	BOOL	R/W	Reactivation of outputs Q0, Q1, and outputs Q2, Q3	%QWr.m.c.0.10
AUTO_MOD_Q3	BOOL	R/W	Manual/automatic mode output Q3 (frequency) 0 : manual, 1: automatic (programmable frequency)	%QWr.m.c.0.11
AUTO_MOD_Q0	BOOL	R/W	Manual/automatic output mode Q0 0 : manual, 1: automatic	%QWr.m.c.0.12
AUTO_MOD_Q1	BOOL	R/W	Manual/automatic output mode Q1 0 : manual, 1: automatic	%QWr.m.c.0.13
MANU_CMD_Q0	BOOL	R/W	Manual command output Q0	%QWr.m.c.0.14
MANU_CMD_Q1	BOOL	R/W	Manual command output Q1	%QWr.m.c.0.15

Unmask event commands, word %QWr.m.c.1

The table below shows the meanings of word bits QWr.m.c.1.

Standard symbol	Type	Access	Meaning	Address
ENAB_UNMSK	BOOL	R/W	Enable event unmasking	%QWr.m.c.1.0
PRES_UNMSK	BOOL	R/W	Unmask preset or reset event	%QWr.m.c.1.1
CAPT_UNMSK	BOOL	R/W	Unmask capture event	%QWr.m.c.1.2
THR0_UNMSK	BOOL	R/W	Unmask threshold 0 event	%QWr.m.c.1.5
THR1_UNMSK	BOOL	R/W	Unmask threshold 1 event	%QWr.m.c.1.6
INC_MOD_UNMSK	BOOL	R/W	Unmask module crossing + direction event	%QWr.m.c.1.12
DEC_MOD_UNMSK	BOOL	R/W	Unmask module crossing - direction event	%QWr.m.c.1.13