Module TSX CTY 2C also has a specialized interface for a series absolute encoder, for applications that measure and monitor speed.
This section describes the operation of this specific input interface.
In this configuration, SSI Data physical input and SSICLK physical output are connected to the series output absolute encoder.
It is also possible to connect up one to four parallel output absolute encoders by using the adaptation bases (see the Installation Manual).
Description of the SSI interface
The figure below represents an SSI frame.
The main other frame and interface features are as follows:
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Parameters
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Values or observations
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Code
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Binary or Gray
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SSICLK transmission speed
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150 kHz, 200 kHz, 375 kHz, 500 kHz, 750 kHz or 1 MHz
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Header bits
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Ignored
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Data bits
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-
8 active data bits minimum.
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17 masked most significant bits maximum (rollover counting).
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17 masked least significant bits maximum (resolution reduction).
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Status bits
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An error bit specific to the encoder. Its frame position and significance can be configured.
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Parity
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Even, odd (not monitored by the module) or without parity.
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With an absolute encoder, the up/down counting is carried out implicitly in rollover mode. The number of unmasked bits directly gives the rollover value. The counting register changes in the [0, rollover] interval. The minimum rollover value is 1 and its maximum value is +33 554 432 (25 data bits without masked bit).
