Comparison
Original instructions
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At a Glance
The comparison block operates automatically. This block is available in certain counting modes:
Comparison Thresholds
The comparison block has two thresholds:
The upper threshold value must be greater than the lower threshold value.
If the upper threshold is less than or equal to the lower threshold, the lower threshold does not change but it is ignored.
This rule takes into account the format of the counter value.
Comparison Status Register
The result of the comparison is stored in the compare_status register (%IWr.m.c.1).
The values of the two capture registers and the current value of the counter are compared with the thresholds.
The possible results are:
The compare_enableregister (%IWr.m.c.1) consists of:
Status register bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Compared element
Capture 1
Capture 0
Counter
Comparison result
High
Window
Low
High
Window
Low
High
Window
Low
Update
When the compare_enable bit (%QWr.m.c.0.5) is set to 0, the comparison status register is deleted.
The comparison with capture 0 and capture 1 registers values is performed every time the registers are loaded.
The comparison with the counter current value is performed as follows:
Counting mode
Registers updating
Frequency
Intervals of 10 ms
Period measuring
At the end of the period
Ratio
Intervals of 10 ms
Event counting
Period intervals defined by the user
One shot counter
Intervals of 1 ms
Counter reloading
Counter stops
Threshold crossing
Modulo loop
Intervals of 1 ms
Counter reloading or resetting to 0
Counter stops
Threshold crossing
Free large counter
Intervals of 1 ms
Counter reloading
Threshold crossing
Pulse width modulation
Function not available in this mode
Modification of the Thresholds during the Operational Phase
When the compare_enable bit (%QWr.m.c.0.5) is set to 0, the comparison status register is deleted.
When the compare_suspend bit (%QWr.m.c.0.6) is set to 1, the value of the comparison status register is frozen until the bit switches back to 0.
The application may change threshold values without causing any disturbance when the compare_suspend bit (%QWr.m.c.0.6) is set to 1.
This functionality allows modifying the application thresholds without modifying the status register behaviour.
When this bit switches back to 0, the comparisons restart with new threshold values.
The following figure illustrates the actions of the compare_enable bit (%QWr.m.c.0.5) and the compare_suspend bit (%QWr.m.c.0.6):