Using the frequency mode allows you to measure an event frequency, speed, rate and flow.
In this mode, the module monitors the pulses applied only to the IN_A input and calculates the number of pulses in time intervals of 1 s. The current frequency is then shown in number of events per second (hertz). The counting register is updated at the end of each 10 ms interval.
Counter Status Bits in Frequency Mode
The table below shows the composition of the counter’s %IWr.m.c.0 status word in frequency mode.
|
Bit
|
Label
|
Description
|
|
%IWr.m.c.0.3
|
VALIDITY
|
Validity bit is used to indicate that the counter current value (frequency) and compare status registers contain valid data.
If the bit is set to 1, the data is valid.
If the bit is set to 0, the data is not valid.
|
|
%IWr.m.c.0.4
|
HIGH_LIMIT
|
The bit is set to 1 when the input frequency signal is out of range.
|
In this mode, the type of the IODDT must be T_UNSIGNED_CPT_BMX.
The maximum frequency that the module can measure on the IN_A input is 60 kHz. Beyond 60 kHz, the counting register value may decrease until it reaches 0. Beyond 60 kHz and up to the real cut-off frequency of 100 kHz, the module may indicate that it has exceeded the frequency limit.
When there is a variation in frequency, the value restoration time is 1 s with a value precision of 1 Hz. When there is a very significant variation in frequency, an accelerator enables you to restore the frequency value with a precision of 10 Hz in 0.1 s.
The maximum duty cycle at 60 KHz is 60%.
NOTE: You have to check the validity bit (%IWr.m.c.0.3) before taking into account the numerical values such as the counter and the capture registers. Only the validity bit at the high level (set to 1) guarantees that the mode will operate correctly within the limits.
