TBX Device Compatibilities

At a Glance

The following compatibility information concerns:

The address settings supported by the different connectable devices,
The memory size these devices occupy in the configuration RAM.

Rules of Use

The device connected to a connection point, if it is modular, must have a uniform application: Discrete base and extension, or analog base and extension (no Discrete/analog mix).

The device (base and extension) is controlled by a single FAST or MAST Control Expert task (no group assigning of channel groups of a single TBX to different tasks).

Address Settings

Fipio address settings depend on the type of device:

Type of Device	FIPIO addresses	Comments
Compact TSXs	1...31	TBX C•
Dust and damp proof TBXs	1...62, 64...127	TBX E•
Modular TBXs	1...62, 64...127	TBX LEP •••
AS-i gateway	1...62, 64...127	TBX SAP 10

Memory Space

Each processor has a memory space available for Fipio devices. This memory space equals 95744 bytes for TSX P57 154/254/354 processors and 214528 bytes for SX P57 454/554 processors.

Each Fipio device connected to the bus uses part of this memory space. The memory used by the devices connected to the Fipio bus must be less than the processor’s available memory. When calculating the memory used, you must add an offset of 1424 bytes.

The following table lists the memory values used in bytes for each TBX module.

Module	Base	Extended	Maximum number of connection points
			TSX P57 154	TSX P57 254/354	TSX P57 454/554
AES 400, ASS 200	1332	-	62	70	126
		272	2 or 4 channels
		272	59	59	126
AMS 620	1584	-	59	59	126
		272	2 channels
			50	50	100
			4 channels
			50	50	84
		528	8 channels
		528	44	44	63
CEP 1622, CSP 1622, CSP 1625	1152	-	10 or 12 channels
CEP 1622, CSP 1622, CSP 1625	1152	-	31	31	31
DES 16••, DMS 16••, DSS 16••	1152	-	62	81	126
DES 16••, DMS 16••, DSS 16••	1152	144	62	64	64
DSS 1235	1152	144	62	72	85
DMS 1025	1152	144	62	72	102
EEP/ESP 08C22/1622	1152	-	62	64	126
TBX SAP 10	1808	-	52	52	117

Example:

For a TSX P57 154 processor:

Two TBX AES 200 (base and extension) and a TBX AMS 620 (base) are connected to the Fipio bus.

The memory used equals 4612, i.e.: 1332+272+1584+1424 (offset).

In this case, the memory used by the devices (4612) is less than the processor’s memory (95744).