This is the default behavior of the ERT when connecting or reconnecting a stabile power supply.
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All recorded events, counter values and the current parameters of the ERT are initialized with a defined state.
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The recording of the process data is delayed until the PLC has been started and can therefore provide the ERT with a valid parameter set.
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Since the ERT does not have a hardware clock, the internal software clock is invalid until it has been synchronized in a suitable form:
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Depending on the source which has been configured for time synchronization, the time stamps for all recorded events are set to invalid time until either: the internal clock is set with a DPM_Time value using the EFB or time synchronization with an external time signal has occurred.
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A special case: If the "clock" parameter of the ERT was configured as an "internal clock" in free running mode (with a validity reserve of zero), the internal clock starts with a default setting at hour 0 on 1/1/1990.
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If a "complete time report" has been configured, a complete time transfer is done directly before the first recorded event so that the clock synchronization follows.
The current data of the ERT 854 10 can be protected from a power loss if the rack has a 140 XCP 900 00 battery module. If the supply voltage falls below a defined limit, it will be recognized by the rack. All recorded data, counter values and the current parameter set are saved in a non-volatile RAM by the firmware and remain until the next warm start (see below). In situations where the saving in the ERT does not happen (5 VDC short circuit or hot swap of the ERT module), a cold start is performed.
Reconnecting a stabile supply voltage causes a warm start of the ERT module, as long as the module is in a state where it can store the current data in a consistent form.
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All recorded events, counter values and the current parameters of the ERT are restored from the non-volatile RAM.
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If the "warm start" parameters ("Clear counter"/"clear message buffer") are configured, the recorded events and/or counter values are erased.
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Recording of the process data with the ERT is immediately continued with the same parameter set even if the PLC is not started yet or the remote connection could not be restored at this time.
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Since the ERT does not have a hardware clock, the software clock is invalid until it has been synchronized in a suitable form:
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Depending on the source which has been configured for time synchronization, the time stamps for all recorded events are set to invalid time until either: the internal clock is set with a DPM_Time value using the EFB or time synchronization with an external time signal has occurred.
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A special case: If the "clock" parameter of the ERT was configured as an "internal clock" in free running mode (with a validity reserve of zero), the internal clock starts with a default setting at hour 0 on 1/1/1990.
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If a "complete time report" has been configured, a complete time transfer is done directly before the first recorded event so that the clock synchronization follows.
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If the corresponding "ERT_854_10" transfer EFB is active in the PLC again, the transfer of the events and counter values in the FIFO buffer of the ERT is continued. Current binary input values and status words are also transferred.
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If the PLC provides a new parameter set when starting which would mean a change in the time of process data evaluation, all recorded events and counter values are cleared since they would no longer be consistent with the new parameter set.
