Description of System Bits %S62 to %S79
Original instructions
Detailed Description
Description of system bits %S62 to %S79:
Bit
Symbol
%S62
CARDVAL
Function
Valid card signature
Initial State
0
Platforms
M340: Yes M580: Yes M580 Safety: Yes Quantum: No Momentum: No Premium: No Atrium: No
This bit is set to 1 if the SD card contains a valid signature area.
NOTE: The validity does not include the value of user signature.
The signature can be written using an EF. %S62 is updates after the signature write (EF call), when a card is inserted or ejectted, and when the CPU starts.
%S65
CARDIS
Function
Memory card disable
Initial State
0
Platforms
M340: Yes M580: Yes M580 Safety: Yes Quantum: No Momentum: No Premium: No Atrium: No
This bit is used to ensure information consistency when a memory card is extracted from the CPU.
To do this, it is necessary to generate a rising edge on the bit %S65 before extracting the memory card.
On a rising edge detection, the card accessing LED turns off when the current accesses are finished (reading and writing of files, application saving). The CARDERR LED is unchanged.
Now the memory card can be extracted, the CARDERR LED remains or turns on.
When a memory card is inserted:
  • the accessing LED turns on
  • the CARDERR LED shows the memory card status
  • %S65 remains unchanged
    %S65 must reset to 0 to allow rising edge detection.
NOTE: If a rising edge is generated on the bit and the memory card is not extracted, resetting the bit to 0 does not make the memory card accessible.
To make the memory card accessible again either:
  • extract and re-insert the memory card
  • re-initialize the PLC (using the power supply reset button)
%S66
APPLIBCK
Function
Application backup
Initial State
0
Platforms
M340: Yes M580: Yes M580 Safety: Yes Quantum: No Momentum: Yes Premium: No Atrium: No
This bit is set to 1 by the user to start a backup operation (transfer application from RAM to card). The system will detect the rising edge to start the backup. The state of this bit is polled by the system every second. A backup takes place only if the application in RAM is different from the one in the card.
This bit is set to 0 by the system when the backup is finished.
Warning: Before doing a new backup by setting bit %S66 to 1, you must test that bit %S66 has been set to 0 by the system (meaning that the previous backup has finished).Never use %S66 if it is set to 1. This may lead to a loss of data.
Bit %S66 is particularly useful after replacement of initial value %S94 and save-parameters.
%S67
PCMCIABAT0
Function
State of the application memory card battery
Initial State
Platforms
M340: No M580: No M580 Safety: No Quantum: Yes Momentum: No Premium: Yes Atrium: Yes
This bit is used to monitor the status of the main battery when the memory card is in the upper PCMCIA slot. This applies to Atriums, Premiums and Quantums (CPU 140 CPU 671 60/60S, 140 CPU 672 61, 140 CPU 672 60, 140 CPU 651 60/60S, 140 CPU 652 60 and 140 CPU 651 50):
  • set to 1: main voltage battery is low. The application is kept but the battery must be replaced following the predictive maintenance procedure),
  • set to 0: main battery voltage is sufficient (application always kept).
NOTE: With “blue” PCMCIAs (PV>=04), bit %S67 is not set to 1 when main battery is absent, though with “green“ PCMCIAs (PV<04), bit %S67 is set to 1 in the same condition.
%S68
PLCBAT
Function
State of processor battery
Initial State
Platforms
M340: No M580: No M580 Safety: No Quantum: Yes Momentum: No Premium: Yes Atrium: Yes
This bit is used to check the operating state of the backup battery for saving data and the program in RAM.
  • set to 0: battery present and operational.
  • set to 1: battery missing or non-operational.
%S75
PCMCIABAT1
Function
State of the data storage memory card battery
Initial State
Platforms
M340: No M580: No M580 Safety: No Quantum: Yes Momentum: No Premium: Yes Atrium: Yes
This bit is used to monitor the main battery status when the memory card is in the lower PCMCIA slot.
For Premium processors, %S75 is supported by the following processors: TSX P57 4••, TSX P57 5•• and TSX P57 6••.
NOTE: For all others Premium processors, %S75 shows a low battery level only when the battery is already at a critical level.
For Quantum processors, %S75 is supported by the following processors: 140 CPU 672 61*, 140 CPU 672 60*, 140 CPU 671 60/60S*, 140 CPU 651 60/60S*, 140 CPU 652 60, and 140 CPU 651 50.
* Data stored on a memory card in slot B is not processed in safety projects.
%S75 is:
  • set to 1 when the main battery voltage is low. The application is kept but the battery must be replaced following the predictive maintenance procedure,
  • set to 0 when the main battery voltage is sufficient (application always kept).
%S76
DIAGBUFFCONF
Function
Configured diagnostics buffer
Initial State
0
Platforms
M340: Yes M580: Yes M580 Safety: Yes Quantum: Yes Momentum: Yes Premium: Yes Atrium: Yes
This bit is set to 1 by the system when the diagnostics option has been configured – a diagnostics buffer for storage of errors found by diagnostics DFBs is then reserved.
This bit is read-only.
%S77
DIAGBUFFFFULL
Function
Full diagnostics buffer
Initial State
0
Platforms
M340: Yes M580: Yes M580 Safety: Yes Quantum: Yes Momentum: Yes Premium: Yes Atrium: Yes
This bit is set to 1 by the system when the buffer that receives errors from the diagnostics function blocks is full.
This bit is read-only.
%S78
HALTIFERROR
Function
Stop in the event of error
Initial State
0
Platforms
M340: Yes M580: Yes M580 Safety: Yes Quantum: Yes Momentum: Yes Premium: Yes Atrium: Yes
Normally at 0, this bit can be set to 1 by the user, to program a PLC stop on application fault: %S15, %S18,%S20.
On M580 safety, it applies to both process tasks and the SAFE task. If the bit is set, for example if a %S18 overflow error rises, the SAFE task enters HALT state.
%S79
MBFBCTRL
Function
Modbus forced bit control
Initial State
0
Platforms
M340: No M580: No M580 Safety: No Quantum: Yes Momentum: No Premium: No Atrium: No
This bit change the behavior of the Quantum Modbus server regarding forced bits:
  • at 0 (default value), standard management: bit value is changed even if the bit is forced.
  • if set to 1 by the user: write bits request on forced bits do not change their value. There is no error in the response of the request.
As other accesses, the history bit is always updated, whatever the forcing state.