Overview
Time resolution is a key point in selecting the time stamped events sources.
Time and time stamp resolution are to be understood as follows:
Internal module time resolution: absolute time resolution depending on the module internal clock (and I/O management for BMX CRA 312 10 module).
Time stamp resolution between 2 events in the same module: depends on the module internal I/O polling rate or cycle.
Time stamp resolution between 2 events on different source modules of the same family (BMX ERT 1604 T or BMX CRA 312 10): time resolution between 2 source modules depends on the time source (external clock) tolerance, each module internal time resolution (and network transmission delay for modules synchronized through NTP).
Time stamp resolution between 2 events on different source modules of a different family (BMX ERT 1604 T and BMX CRA 312 10): same constraints as with 2 source modules of the same family, except that the time stamp resolution will be the one of the less accurate module.
Time and Time Stamp Resolution
Value |
System Events Source Module(s) |
Value |
Comment |
|---|---|---|---|
Internal time resolution |
BMX ERT 1604 T |
1 ms |
Internal clock resolution |
BMX CRA 312 10 |
Internal clock resolution |
||
Time stamp resolution between 2 events in the same module |
BMX ERT 1604 T |
1 ms |
|
BMX CRA 312 10 |
1...3 ms (module scan time) |
Time stamp resolution depends on the module cycle time |
|
Time stamp resolution between 2 events on different source modules |
n x BMX ERT 1604 T (1.) |
• 2 ms with IRIG-B 004/5/6/7 time code (GPS) • 4 ms with DCF77 time code |
NOTE: Time stamp resolution
is given provided that each BMX ERT 1604
T module is supplied with the same time source.
|
n x BMX CRA 312 10 (1.) |
10 ms |
||
n x BMX ERT 1604 T + n x BMX CRA 312 10 (1.) |
10 ms |
NOTE: Highest time stamp
resolution becomes the system time stamp resolution.
|
|
1. n = many modules, maximum value depends on system architecture |
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