Time Synchronization on System Start

On system start, the time stamping modules begin to time stamp events without waiting for the initial time synchronization. To signal that the first synchronization has not been done yet to the SCADA server, the following parameters of TimeQuality are set to 1:

  • ClockNotSynchronized

  • ClockFailure

Once the time stamping module time is synchronized, ClockNotSynchronized and ClockFailure parameters are set to 0 in TimeQuality.

Time Synchronization When the System Is Running

When the system is running, each time stamping module periodically synchronizes its clock with the external clock reference. On synchronization, 3 situations appear:

Module internal time is equal to external clock time:

No change in module internal time.
Module internal time is delayed compared to external clock time:

Module internal time synchronizes with external clock time.
Module internal time is ahead of external clock time:

Module internal time synchronizes with external clock time in the following way:

  • Module internal time is ahead of external clock time while the Device DDT status of BM• CRA 312 10 is:TIME_VALID=1CLOCK_FAILURE=0CLOCK_NOT_SYNC=0.

  • Catch-up mechanism is used to keep time coherence in sequence of events (event n+1 cannot be earlier than event n) and to minimize the time increment recorded in the next timestamp time value:

    Catch-up time = (Internal time - Synchronized time received) x Detection cycle / (Detection cycle - Incrementation step)

NOTE: “Catch-up time”: the time required to synchronize the time stamp value with the new internal time.

Synchronization mechanism until module internal time > last time stamp value (internal time cannot be accessed by the user):

  • Every time stamping detection cycle, the time stamp value increments by the maximum of:

    • 1 ms; or

    • Detection cycle time (in a BMX ERT 1604 T module, increment value is 1 ms)

  • The catch-up mechanism activity can be diagnosed in the TimeQuality byte when TimeAccuracy = ClockInSync (0xx11011 bin).

The following figure illustrates the synchronization mechanism in a BMX CRA 312 10 module when the internal time is ahead of external clock time (5 ms detection cycle and 1 ms incrementation step):

The following table presents the SOE sequence shown in previous figure provided by a BMX CRA 312 10 time stamping module with 1 time stamped input:

Event

Event Value

TimeStamp

(ms)

Module Internal Time (ms)

TimeQuality Attributes

Comment

CRA INPUT 1

(0 -> 1)

1

100

100

Time Resolution = 1 ms

  

No event

N.A.

N.A.

86

N.A.

External clock synchronization value received.

CRA INPUT 1

(1 -> 0)

0

101

88

ClockInSync

Internal Time (n) <=Time Stamp (n-1)

=> Time Stamp (n) = Time Stamp (n-1) + 1 ms

CRA INPUT 1

(0 -> 1)

1

102

93

ClockInSync

Internal Time (n) <= Time Stamp (n-1)

=> Time Stamp (n) = Time Stamp (n-1) + 1 ms

CRA INPUT 1

(1 -> 0)

0

103

98

ClockInSync

Internal Time (n) <= Time Stamp (n-1)

=> Time Stamp (n) = Time Stamp (n-1) + 1 ms

CRA INPUT 1

(0 -> 1)

1

104

103

ClockInSync

Internal Time (n) <= Time Stamp (n-1)

=> Time Stamp (n) = Time Stamp (n-1) + 1 ms

CRA INPUT 1

(1 -> 0)

0

108

108

Time Resolution = 1 ms

Internal Time (n) > Time Stamp (n-1)

=> Time Stamp (n) = Internal Time (n)

N.A. Not Applicable

In this example: Catch-up time = (100 - 86) x 5 / (5 - 1). Catch-up time = 17.5 ms (around 4 detection cycles of 5 ms).

NOTE: The following list presents some fields available in previous table and their corresponding fields in AVEVA Plant SCADA SOE page:

  • Event: Data available in Tag, Name and Message fields in AVEVA Plant SCADA SOE display.

  • Timestamp: Data available in Date and Time fields in AVEVA Plant SCADA SOE display.

  • TimeQuality Attributes: Data available in Quality and TSQuality fields in AVEVA Plant SCADA SOE display.

Time Synchronization Lost When the System Is Running

If the time synchronization is lost (no link with the external time reference), the time stamping module time stamps events with its internal time, based on the latest successful synchronization.

NOTE: If the time has never been synchronized, then the internal time is the free running time from epoch.

As in the initial start case, to manage that situation, CLOCK_NOT_SYNC parameter is set to 1 (and ClockNotSynchronized parameter is set to 1 in TimeQuality byte).

Once the time stamping module time is synchronized, CLOCK_NOT_SYNC parameter is set to 0 (and ClockNotSynchronized parameter is set to 0 in TimeQuality byte).

NOTE: As the time synchronization mechanism is specific to each module, the time interval between the loss of time synchronization and the setting of CLOCK_NOT_SYNC parameter is different for a BMX ERT 1604 T and a BM• CRA 312 10 module.

Time interval between the loss of time synchronization and the setting of CLOCK_NOT_SYNC parameter:

  • for a BMX ERT 1604 T: 10 seconds (IRIG-B) or 10 minutes (DCF77).

  • for a BM• CRA 312 10: 3 seconds after the scheduled polling time.