Detecting High Speed Sync-Link Interruptions
Original instructions
About us
Diagnostic Information
Facts
1
High-speed data link connects the two Copros.
2
Using the high-speed data link, the primary CPU controller communicates with the standby CPU every 10 milliseconds.
3
Primary CPU sends either:
  • data message
  • health message
NOTE: If both the primary CPU and standby CPU do not hear from each other, either station can detect a high speed data link interruption.
Standby CPU Detects an Error
At first,
Step
Action
Result
1
Standby CPU does not hear from the primary CPU on the high-speed data link
  1. Standby CPU requests the primary CPU to monitor the RIO link
  2. Primary CPU sends a request to the RIO Head
When the RIO Head receives the request,
If ...
Then ...
RIO Head finds the RIO link not active
  1. RIO Head assumes that the primary CPU must be down
  2. Standby CPU assumes control
RIO Head finds the RIO link is active
Message received from primary CPU must be either:
  1. health message
    Messages are sent every 5 milliseconds from primary CPU RIO Head to standby CPU RIO Head.
  2. I/O transaction data message
    Messages are sent from the primary CPU RIO Head to the I/O drops at the request of the controller.
Facts about the I/O
1
If the message is an I/O transaction, the RIO Head:
  1. concludes an interruption occurred on the high-speed data link
  2. informs the stancby CPU controller to go to offline
2
If you never configure an I/O drop, the high-speed data link could cause the standby CPU to assume control since the standby CPU RIO head will never receive any I/O transaction message.
3
After any CPU error is detected:
  1. RIO Head does not perform drop communication
  2. RIO Head sends only health messages
Standby CPU Assumes Control
The standby CPU becomes primaryprimary CPU
Step
Action
Result
1
After the primary CPU controller goes offline,
A health message from the standby CPU controller is the only message received by the standby CPU RIO Head.
2
Standby CPU controller listens to the high-speed data link for one scan.
3
If standby CPU controller hears nothing,
standby CPU knows that the cause must be on both the primary CPU Copro and primary CPU.
4
Standby CPU assumes control.