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TSX P57 0244 processors
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(Original Document)
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TSX P57 0244 processors
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(Original Document)
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Characteristics
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TSX P57 0244
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Maximum configuration
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Maximum number of TSX RKY 12EX racks
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1
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Maximum number of TSX RKY 4EX/6EX/8EX racks
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1
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Maximum number of slots
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10
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Maximum number of simultaneous communication EF
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16
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Functions
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Maximum number of channels
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In-rack discrete I/O
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256
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In-rack analog I/O
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12
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Expert (counting, axis, etc.)
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4
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Maximum number of connections
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Built-in Uni-Telway (terminal port)
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1
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Network (ETHWAY, Fipway, Modbus Plus)
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1
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Master Fipio (built-in)
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-
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Third party field bus
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-
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AS-i field bus
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1
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Savable real-time clock
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yes
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Memory
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Savable internal RAM
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96K8
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PCMCIA memory card (maximum capacity)
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128K8
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Application structure
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Master task
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1
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Fast task
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1
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Event processing (1 has priority)
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32
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Application code execution speed:
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Internal RAM
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100% Boolean
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4.76 Kins/ms (1)
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65% Boolean + 35% digital
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3.57 Kins/ms (1)
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PCMCIA card
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100% Boolean
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3.10 Kins/ms (1)
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65% Boolean + 35% digital
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2.10 Kins/ms (1)
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Execution time
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Basic Boolean instruction
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0.19/0.25 μs (2)
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Basic digital instruction
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0.25/0.50 μs (2)
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Floating point instruction
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1.75/3.30 μs (2)
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System overhead
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Master task
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1 ms
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Fast task
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0.30 ms
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