Discrete Modules

With firmware 2.4 or later, you can access the modules either via topological or State RAM addresses. Please also refer to Memory Tab.

The following table shows the Modicon X80 discrete module objects that can be mapped to topological or State RAM addresses.

Module reference

Topological address

State RAM address

BMX DAI 0805

BMX DAI 0814

%I rack.slot.channel, channel [0,7]

-%IStart address ... %IStart address + 7, one channel per %I

or

-%IWStart address, one channel per bit of %IW

BMX DAI 1602

%I rack.slot.channel, channel [0,15]

- %IStart address ... %IStart address + 15, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DAI 1603

%I rack.slot.channel, channel [0,15]

- %IStart address ... %IStart address + 15, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DAI 1604

%I rack.slot.channel, channel [0,15]

- %IStart address ... %IStart address + 15, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DAI 0804

%I rack.slot.channel, channel [0,7]

- %IStart address ... %IStart address + 7, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DAI 1614

BMX DAI 1615

%I rack.slot.channel, channel [0,15]

- %IStart address ... %IStart address + 15, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DAO 1605

%Q rack.slot.channel, channel [0,15]

- %MStart address ... %MStart address + 15, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DAO 1615

%Q rack.slot.channel, channel [0,15]

- %MStart address ... %MStart address + 15, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DAO 0805

%Q rack.slot.channel, channel [0,7]

- %MStart address ... %MStart address + 7, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DDI 1602

%I rack.slot.channel, channel [0,15]

- %IStart address ... %IStart address + 15, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DDI 1603

%I rack.slot.channel, channel [0,15]

- %IStart address ... %IStart address + 15, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DDI 1604

%I rack.slot.channel, channel [0,15]

- %IStart address ... %IStart address + 15, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DDI 0804

%I rack.slot.channel, channel [0,7]

- %IStart address ... %IStart address + 7, one channel per %I

or

- %IWStart address, one channel per bit of %IW

BMX DDI 3202K

%I rack.slot.channel, channel [0,31]

- %IStart address ... %IStart address + 31, one channel per %I

or

- %IWStart address ... %IWStart address + 1, one channel per bit of %IW

BMX DDI 3203

%I rack.slot.channel, channel [0,31]

- %IStart address ... %IStart address + 31, one channel per %I

or

- %IWStart address ... %IWStart address + 1, one channel per bit of %IW

BMX DDI 3232

%I rack.slot.channel, channel [0,31]

- %IStart address ... %IStart address + 31, one channel per %I

or

- %IWStart address ... %IWStart address + 1, one channel per bit of %IW

BMX DDI 6402K

%I rack.slot.channel, channel [0,63]

- %IStart address ... %IStart address + 63, one channel per %I

or

- %IWStart address ... %IWStart address + 3, one channel per bit of %IW

BMX DDM 16022

%I rack.slot.channel, channel [0,7]

%Q rack.slot.channel, channel [16,23]

- %IStart address ... %IStart address + 7, one channel per %I

and

- %M Start address ... %MStart address + 7, one channel per %M

or

- %IWStart address, one channel per bit of %IW

and

%MWStart address, one channel per bit of %MW

BMX DDM 16025

%I rack.slot.channel, channel [0,7]

%Q rack.slot.channel, channel [16,23]

- %IStart address ... %IStart address + 7, one channel per %I

and

- %M Start address ... %MStart address + 7, one channel per %M

or

- %IWStart address one channel per bit of %IW

and

- %MWStart address, one channel per bit of %MW

BMX DDM 3202K

%I rack.slot.channel, channel [0,15]

%Q rack.slot.channel, channel [16,31]

- %IStart address ... %IStart address + 15, one channel per %I

and

- %M Start address ... %MStart address + 15, one channel per %M

or

- %IWStart address, one channel per bit of %IW and

- %MWStart address, one channel per bit of %MW

BMX DDO 1602

%Q rack.slot.channel, channel [0,15]

- %MStart address ... %MStart address + 15, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DDO 1612

%Q rack.slot.channel, channel [0,15]

- %MStart address ... %MStart address + 15, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DDO 3202K

%Q rack.slot.channel, channel [0,31]

- %MStart address ... %MStart address + 31, one channel per %M

or

- %MWStart address ... %MWStart address + 1, one channel per bit of %MW

BMX DDO 6402K

%Q rack.slot.channel, channel [0,63]

- %MStart address ... %MStart address + 63, one channel per %M

or

- %MWStart address ... %MWStart address + 3, one channel per bit of %MW

BMX DRA 0804

%Q rack.slot.channel, channel [0,7]

- %MStart address ... %MStart address + 7, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DRA 0805

%Q rack.slot.channel, channel [0,7]

- %MStart address ... %MStart address + 7, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DRA 0815

%Q rack.slot.channel, channel [0,7]

- %MStart address ... %MStart address + 7, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DRC 0805

%Q rack.slot.channel, channel [0,7]

- %MStart address ... %MStart address + 7, one channel per %M

or

- %MWStart address, one channel per bit of %MW

BMX DRA 1605

%Q rack.slot.channel, channel [0,15]

- %MStart address ... %MStart address + 15, one channel per %M

or

- %MWStart address, one channel per bit of %MW

For additional information please refer to Special Conversion for Compact I/O Modules.