Modulo Loop Counter Mode Debugging
Original instructions
At a Glance
The table below presents the modulo loop counter mode debugging elements:
Label
Language object
Type
Counter value
%IDr.m.c.2
Digital
Counter valid
%IWr.m.c.0.3
Binary
Counter low
%IWr.m.c.1.0
Binary
Counter in window
%IWr.m.c.1.1
Binary
Counter high
%IWr.m.c.1.2
Binary
Counter in low limit
%IWr.m.c.0.5
Binary
Counter in high limit
%IWr.m.c.0.4
Binary
Capture value
%IDr.m.c.4
Digital
Capture low
%IWr.m.c.1.3
Binary
Capture in window
%IWr.m.c.1.4
Binary
Capture high
%IWr.m.c.1.5
Binary
Capture enable
%QWr.m.c.0.3
Binary
Input A state
%Ir.m.c.4
Binary
Input B state
%Ir.m.c.5
Binary
Input SYNC state
%Ir.m.c.6
Binary
SYNC enable
%QWr.m.c.0.0
Binary
SYNC force
%Qr.m.c.4
Binary
SYNC state
%IWr.m.c.0.2
Binary
SYNC reset
%QWr.m.c.8
Binary
Input EN
%Ir.m.c.7
Binary
EN enable
%QWr.m.c.0.2
Binary
Counter enable
%Qr.m.c.6
Binary
Output 0 state
%Ir.m.c.0
Binary
Output 0 cmd
%Qr.m.c.0
Binary
Output 1 state
%Ir.m.c.1
Binary
Output 1 cmd
%Qr.m.c.1
Binary
Counter reset
%Qr.m.c.7
Binary
Output latch 0 state
%Ir.m.c.2
Binary
Output latch 0 enable
%Qr.m.c.2
Binary
Output latch 1 state
%Ir.m.c.3
Binary
Output latch 01enable
%Qr.m.c.3
Binary
Low threshold value
%QDr.m.c.2
Digital
High threshold value
%QDr.m.c.4
Digital
Compare enable
%QWr.m.c.0.5
Binary
Compare suspend
%QWr.m.c.0.6
Binary
Modulo state
%IWr.m.c.0.1
Binary
Modulo reset
%Qr.m.c.9
Binary
For a description of each language object refer to T_UNSIGNED_CPT_BMX IODDT.